W25Q32DW
Table of Contents
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ............................................................................................................... 5
FEATURES ....................................................................................................................................... 5
PIN CONFIGURATION SOIC 208-MIL ............................................................................................. 6
PAD CONFIGURATION WSON 6X5-MM / 8X6-MM........................................................................ 6
PIN DESCRIPTION SOIC 208-MIL, WSON 6X5/8X6-MM ............................................................... 6
PIN CONFIGURATION SOIC 300-MIL ............................................................................................. 7
PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 7
7.1
7.2
7.3
7.4
7.5
7.6
Package Types ..................................................................................................................... 8
Chip Select (/CS) .................................................................................................................. 8
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ..................................... 8
Write Protect (/WP) .............................................................................................................. 8
HOLD (/HOLD) ..................................................................................................................... 8
Serial Clock (CLK) ................................................................................................................ 8
8.
9.
BLOCK DIAGRAM ............................................................................................................................ 9
FUNCTIONAL DESCRIPTION ....................................................................................................... 10
9.1
SPI/QPI OPERATIONS ...................................................................................................... 10
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
Standard SPI Instructions ..................................................................................................... 10
Dual SPI Instructions ............................................................................................................ 10
Quad SPI Instructions ........................................................................................................... 11
QPI Instructions .................................................................................................................... 11
Hold Function ....................................................................................................................... 11
9.2
WRITE PROTECTION ....................................................................................................... 12
9.2.1
Write Protect Features ......................................................................................................... 12
10.
CONTROL AND STATUS REGISTERS......................................................................................... 13
10.1
STATUS REGISTER .......................................................................................................... 13
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.1.7
10.1.8
10.1.9
10.1.10
10.1.11
10.1.12
BUSY .................................................................................................................................. 13
Write Enable Latch (WEL) .................................................................................................. 13
Block Protect Bits (BP2, BP1, BP0) .................................................................................... 13
Top/Bottom Block Protect (TB) ........................................................................................... 13
Sector/Block Protect (SEC) ................................................................................................ 13
Complement Protect (CMP)................................................................................................ 14
Status Register Protect (SRP1, SRP0)............................................................................... 14
Erase/Program Suspend Status (SUS) .............................................................................. 14
Security Register Lock Bits (LB3, LB2, LB1, LB0) .............................................................. 14
Quad Enable (QE) ............................................................................................................ 15
W25Q32DW Status Register Memory Protection (CMP = 0) ........................................... 16
W25Q32DW Status Register Memory Protection (CMP = 1) ........................................... 17
-2-
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